Silicon Debug Engineer

Job description

Do you have a passion for solving the hardest problems in silicon? Do you thrive at the intersection of circuit theory, device physics, and hands-on failure investigation? As part of our Silicon Debug group, you'll take complex, often elusive silicon failures and systematically uncover their root cause - from electrical characterization all the way down to physical analysis. You and your team will apply deep engineering fundamentals and cutting-edge failure analysis techniques to enable product ramp at scale. Your efforts will directly impact the quality and reliability of state-of-the-art ASICs that power experiences for millions of customers worldwide. Join us, and you'll play a central role in ensuring the silicon we build is everything it needs to be. We have an extraordinary opportunity for Silicon Debug Engineers to investigate and root-cause failures in advanced custom digital megacells (SRAM memories, on-chip sensors, custom data paths) used in high-performance, low-power SoCs. You will bridge the gap between electrical debug and physical failure analysis, working at the frontier of silicon investigation. Description Imagine yourself at the center of our SoC bring-up and product ramp effort, collaborating across circuit design, process engineering, DFT, and failure analysis teams - with a critical impact on getting functional products to millions of customers quickly. Responsibilities: Drive the silicon debug effort involving custom circuits from initial bring-up through volume ramp, owning failure isolation from symptom to root cause. Work with circuit design teams to define silicon characterization and debug requirements for test chips and product chips. Engage with PE / DFT / FA teams to plan and execute electrical and physical characterization strategies. Perform design analysis, modeling/simulation, SPICE simulation, statistical analysis, and silicon bring-up to understand and reproduce failure signatures. Work closely with systems and lab teams to reproduce circuit-level behavior using MBIST, functional diagnostics, and characterization structures. Plan and interpret FA analysis - translating electrical failure signatures into targeted physical analysis strategies and understanding how FA technique choices impact observable circuit behavior. Leverage eFA and pFA techniques including Dynamic Laser Stimulus (DLS), Lock-in Thermography (LIT), Nan…