Silicon Design Lead

OpenAI

San Francisco, United States · Hybrid · Full Time

Posted

Job description

About the Team OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. About the Role We’re looking for a Silicon Design Lead to drive architecture, microarchitecture, and implementation of key IP and subsystems for our AI hardware platforms. You will translate functional, performance, and security requirements into efficient silicon designs, owning technical decisions from architectural definition through implementation and integration. Part of this role will focus on hardware security implementation in close partnership with OpenAI’s Security team. While the Security team owns the overarching security architecture and requirements, you will translate those requirements into silicon microarchitecture and implementation, balancing security capabilities with performance, power, area, and design complexity. The other part of this role will focus on driving general silicon architecture/microarchitecture. In this role, you will: Own architecture, microarchitecture, and implementation of silicon IP and subsystems, from requirements and design specifications through integration and validation. Define hardware interfaces, data flows, and microarchitectural tradeoffs to meet functional, performance, power, and area requirements. Partner closely with OpenAI’s Security team to translate security architecture, requirements, and threat models into implementable hardware capabilities. Design and integrate hardware security mechanisms, including encryption, key management, access controls, isolation, and data protection across silicon subsystems. Evaluate architectural and implementation tradeoffs to ensure security capabilities meet functional and performance requirements. Collaborate with silicon architects, RTL, verification, firmware, and software teams to drive subsystem design, integration, and validation. Review and contribute to RTL implementations, ensuring designs align with architectural intent and system requirements. Evaluate existing an…

Apply for this job